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Ansoft Designer 7.0 在线帮助文档

Nexxim Simulator

Nexxim Simulation Process

Schematic Editor Designs

Netlist Editor Designs

External Netlist Designs With Designer Analysis

External Netlist Designs with Command Line Analysis

Spectre Netlists in Nexxim

Translating Serenade Schematics to Nexxim Schematics

Nexxim Analyses

Viewing the Nexxim Solution Log File

Global Option Defaults

Design-Level Options

Analysis-Specific Options

S-Element Options

W-Element Options

Nexxim Netlist Design Options

Options in the Netlist

Options References

Circuit Temperatures in Nexxim

Setting Options or Temperature in External Files

Controlling Nexxim Output

Schematic Design Output Control

Netlist Design Output Control

Netlist PRINT Statements

PRINT Statements with Simple Values

PRINT Statements with Expressions

Calculated Model Outputs

Wildcard Characters in Output Values

Output of Small-Signal AC Transfer Functions

Port Impedance Resistors in LNA

Adding ALTER Blocks

Using GPUs with Nexxim Analyses

Nexxim Transient Analysis

Running Transient Analysis from the Schematic Editor

Generating a Transient Eye Report

Using an Eye Source and Eye Probe with Transient Analysis

Adding an Eye Scope for Sampled Eye Reports

Add Eye Scope to Schematic

Generate Sampled Eye Report

Adding a Voltage Probe for Eye Measurement Reports

Add Voltage Probe to Schematic

Generate Eye Measurement Report

Adding a MATLAB Probe

Running Transient Analysis from the Netlist Editor

Run Transient Analysis

Transient Analysis Netlist Syntax

Netlist Syntax for Sources and Probes

Transient Analysis Options

Transient Analysis Technical Notes

Initial Conditions for Transient Analysis

Numerical Integration Methods

Trapezoidal Rule

Second Order Backward Difference Formula

Numerical Differentiation Formula

Selecting the Integration Method

Newton-Raphson Iterations

Timestep Control

Controlling Output from Transient Analysis

Transient Continuation

Transient Analysis Error Messages

Nexxim Harmonic Balance

Running Harmonic Balance from the Schematic Editor

Running Harmonic Balance from the Netlist Editor

Run Nexxim Harmonic Balance Analysis

Nexxim Harmonic Balance Netlist Format

Harmonic Balance Analysis Outputs

HB Load-Pull Analysis

Load-Pull Analysis in a Schematic

Load-Pull Analysis Netlist Format

Viewing Load-Pull Analysis Results

Harmonic Balance Options

Harmonic Balance Technical Notes

Nonlinear and Linear Solvers

Nexxim One-Tone Harmonic Balance Analysis

Nexxim N-Tone Harmonic Balance Analysis

Controlling Nexxim Harmonic Balance Analysis

Initial Guess for Vector of Node Voltages

Nonlinear Solver Controls

Linear Solver Controls

Convergence Aids

Handling Strongly Nonlinear Circuits

Increasing Accuracy or Speed

TONE Parameter on Sources

Restriction on Sources with Time Delay

HB Output Notes

HB Load-Pull Analysis Notes

Harmonic Balance Troubleshooting Guide

Inner Iterations Limit Errors

Frequency Divider Circuits

Convergence Check Failures

Nexxim Linear Network Analysis

LNA Circuit Configuration

LNA Circuit Schematic Configuration

LNA Circuit Netlist Configuration

Running LNA from the Schematic Editor

Running LNA from the Netlist Editor

To Run Nexxim Linear Network Analysis

LNA Netlist Syntax

Support for Small Signal Analysis in Imported Netlists

Exporting LNA Results to a File

LNA Technical Notes

LNA Netlist Inputs and Outputs

ZERO_PORT_VALUES Option

Nexxim Group Delay Analysis

Nexxim DC Noise Analysis

Output Noise Matrix

Input-Referred Noise Matrix

LNA-Associated AC Analysis

VerifEye and QuickEye Analyses

Running VerifEye Analysis from the Schematic Editor

Add an Eye Source for VerifEye

Add an Eye Probe for VerifEye

Add an External Step Response to a VerifEye Analysis

Set Up the VerifEye Analysis

Run the VerifEye Analysis

Running VerifEye Analysis from the Netlist Editor

VerifEye Source Netlist Syntax

VerifEye Probe Netlist Syntax

Eye External Step Response Netlist Syntax

VerifEye Analysis Netlist Format

Run VerifEye Analysis

VerifEye Analysis Outputs

Running QuickEye Analysis from the Schematic Editor

Add a QuickEye Source to a Schematic

Add an Eye Probe for QuickEye

Add an External Step Response to a QuickEye Analysis

Set Up the QuickEye Analysis

Run the QuickEye Analysis and Display Results

Running QuickEye Analysis from the Netlist Editor

QuickEye Source Netlist Syntax

QuickEye Probe Netlist Syntax

Eye External Step Response Netlist Syntax

QuickEye Analysis Netlist Format

Run QuickEye Analysis and Display Results

Quick Eye Analysis Outputs

VerifEye and QuickEye Analysis Options

Copying a VerifEye or QuickEye Analysis

QuickEye and VerifEye Technical Notes

QuickEye Analysis

VerifEye Analysis

Feed-Forward Equalization

Decision-Feedback Equalization

Continuous Time Linear Equalization

Transmit Jitter

Peak Distortion Analysis

64b66b and 8b10b Encoding

QuickEye Bitlists

QE and VE Crosstalk Analysis

Crosstalk Differences between QE and VE

QuickEye and VerifEye References

Running AMI Analysis from the Schematic Editor

Set Up the AMI Analysis

Run the AMI Analysis

AMI Analysis Outputs

AMI Impulse Response

AMI Time Domain Waveforms

AMI Eye Diagram Waveforms

AMI Bathtub Charts

AMI Sampled Eye Diagrams

Analyzing AMI Models with VerifEye

AMI Analysis Options

AMI Analysis Technical Notes

The AMI Transmitter

The Linear Channel

The AMI Receiver

Sequence of Operation

Impulse Response and Waveform Data Sets

Prototyping with MATLAB Files

AMI Analysis References

Nexxim Envelope Analysis

Running Nexxim Envelope Analysis from the Schematic Editor

Running an Envelope Analysis from the Netlist Editor

Run Nexxim Envelope Analysis

Nexxim Envelope Analysis Netlist Format

Nexxim Envelope Analysis Options

Nexxim Envelope Analysis Outputs

Nexxim Oscillator Analysis

Running Single-Tone Oscillator Analysis from the Schematic Editor

Running Multitone Oscillator Analysis from the Schematic Editor

Running Resonant Frequency Search from the Schematic Editor

Running Phase Noise Analysis from the Schematic Editor

Running Oscillator Analysis from the Netlist Editor

Oscillator Analysis Netlist Formats

Oscillator Probe Syntax

.OSC Single-Tone Statement

.OSC Multi-Tone Statement

.OSC Resonant Frequency Search Statement

.OSC Phase Noise Analysis Statement

Oscillator Analysis Technical Notes

Using the Oscillator Probe

Controlling Nexxim Oscillator Analysis

Initial Guess for Oscillator Frequency

Controlling Convergence of Oscillator Analysis

Setting Tolerances for Oscillator Analysis

Floating Nodes Warning

Oscillator Analysis Options

Oscillator Analysis Outputs

Viewing OSC Noise Contributors

Nexxim Time-Varying Noise Analysis

Running TV Noise Analysis from the Schematic Editor

Running Periodic Transfer Function Analysis from the Schematic Editor

Running TV Noise Analyses from the Netlist Editor

To Run TV Noise Analyses

TV Noise Netlist Syntax

Periodic Transfer Function Netlist Syntax

TV Noise Results

Viewing TV Noise Contributors

TV Noise Options

TV Noise Technical Notes

Nexxim DC Analysis

Viewing DC Bias Voltages and Currents in a Schematic

Running DC Analysis from the Schematic Editor

DC Operating Point Statement in a Netlist

DC Analysis Options

DC Analysis Technical Notes

Nexxim DC Analysis Overall Flow

Initialization of Nexxim DC Circuit Parameters

Initialization of Nexxim DC Simulation Parameters

Solving the Circuit Equations in Nexxim DC Analysis

Linearization of Nonlinear Device Equations

Nexxim DC Analysis Convergence Criteria

Nexxim DC Analysis/DC Continuation Strategies

Device Continuation

Alpha Continuation

Beta Continuation

Pseudotransient Continuation

Convergence, Speed, and Accuracy

Options that Affect Nexxim DC Convergence Only

Convergence Algorithms

Maximum NR Iterations

NR Limiting Step

Maximum Continuation Iterations

Options that Affect Convergence, Speed, and Accuracy

Relative Voltage and Current Tolerance

Absolute Voltage Tolerance

Absolute Current Tolerance

Alpha Initial Value

Beta Initial Value

Summary of Effects of DC Options

Nexsys Discrete Time Domain Analysis

Creating and Simulating a Nexsys Design

Add Nexsys and Nexxim Components

Nexxim and Nexsys Sources

Interfacing Behavioral and Electrical Components

Set Up and Run Nexxim and Nexsys Analyses

Display Nexsys Simulation Results

Overview of Discrete Time Domain Analysis

Signal and Noise Waveforms

Discrete Time Simulation of Signals and Noise

Discrete Time Simulation of Nonlinear Behavioral Components

Nexsys Simulation of a Mixed Mode Topology

Nexsys Partitioning and Scheduling Process

Assumptions for Nexsys Partitioning

Nexsys MATLAB User Defined Models

Setting Up Nexsys Cosimulation with MATLAB

The Nexsys MATLAB Model File

Model Definition Line

MATLAB Function Definition

Global Variables for Timestep and Center Frequency

Creating a MATLAB UDM Component in Designer

Example MATLAB Model Files

Digital Clock Model

Sinusoidal Source Model

Walsh Modulator Model

Complex FFT Model

Nexxim Monte Carlo Analysis

Running Monte Carlo Analyses

Viewing a Monte Carlo Analysis in a Report

Monte Carlo Analysis Netlist Syntax

Defining a Monte Carlo Netlist Parameter

Uniform Distribution with Absolute Bounds

Uniform Distribution with Relative Bounds

Gaussian Distribution with Absolute Spread

Gaussian Distribution with Relative Spread

Limit or Min/Max Distribution

Setting a Component or Model to Use Monte Carlo Analysis

Monte Carlo Solution Setups

Monte Carlo Analysis Options

Monte Carlo Distributions

Designer Variable Types

Running Variable Sweeps from the Schematic Editor

Setting Up a Local Variable on a Component Parameter

Adding a Sweep of Temperature or of a Local Variable

Setting Up a Frequency Sweep with Harmonic Balance

Setting Up a Frequency Sweep with Linear Network Analysis

Running Variable Sweeps from the Netlist Editor

To Run a Sweep with Any Analysis

Variable Sweep Netlist Syntax

Variable Sweep Netlist Examples

Sweeping Temperature with the TEMP Statement

Viewing a Sweep Analysis in a Report

Restrictions on Sweeping a Choice of Subcircuits

Command Line Controls

Invoking the Nexxim Simulator

Configuration File

Message Controls

Messages from Analysis Tools

Messages from Device Models

Viewing Results in Designer

Support for External Models and Interfaces

SPICE Library Support

SPICE Library Import Procedure

Modifications to SPICE Pin Names

IBIS Library Support

IBIS Library Import Procedure

IBIS File Support

Verilog Library Support

Creating a Verilog Component

Create a Verilog Symbol

Create a Verilog Component

Supported Verilog Features

C Model Library Support

Ways to Use the C Model Interface

C Model Project Files

Model Project File

Model List File

Adding a Compiled DLL

Adding Existing C Code

Creating a New C Code Module

C Model API Functions

API Functions for All Model Types

API Functions for VI Models Only

API Functions for S-Parameter and Y-Parameter Models Only

API Functions for Noise Sources

W-Element Model Support

IBIS AMI Model Support

Nexxim Options Reference

Global Analysis Options Reference

Global Device Options Reference

DC Analysis Options Reference

Transient Analysis Options Reference

Harmonic Balance Options Reference

Linear Network Analysis Options Reference

Oscillator and Phase Noise Analysis Options Reference

Envelope Analysis Options Reference

TV Noise and PXF Analysis Options Reference

VerifEye and QuickEye Analysis Options Reference

AMI Analysis Options Reference

S-Element Options Reference

W-Element Options Reference

Nexxim Model Library

Selecting Devices and Models in the Schematic Editor

Devices Available Only in Netlists

Instance Statements

Model Statements

Global Device Options

Global Device Options

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