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Nexxim Simulator > Interdigital Capacitor, Parallel
Netlist FormAn instance of an interdigital capacitor, parallel has the netlist format: AMSICAPPxxxx n1 n2 N=val W=val S=val L=val WT=val WF1=val WF2=val WCA=val GAP=val COMPONENT=icap_parallel SUBSTRATE=substrate_name n1 and n2 are the names of the nodes attached to the capacitor. The entry COMPONENT=icap_parallel identifies the element. The entry SUBSTRATE=substrate_name identifies the microstrip substrate model name selected for the design (see Selecting a Microstrip Substrate). See the Microstrip (MS) Substrate for information on this substrate type.
Netlist ExampleAMSICAPP23 net1 Port2 N=5 W=0.001 S=0.0001 L=1.0e-3
where FR4, the selected layout technology or substrate type, has a definition such as: .SUB FR4 MS( H=7.6200e-004 Er=4.4 TAND=0.02 TANM=0 Notes1. The output line width WF2 must be less than or equal to the total width of the capacitor: WF2 <= WCA. 2. The finger width W and the spacing between adjacent fingers S are the same for all fingers. 3. The model takes into account the effect of the step from the terminal strip to the output at node 3. A T-junction is used to model the connection bewteen the feedline and the ICAP fingers. 4. The capacitor width WCA has a default value of (N*W + S*(N-1)). WCA can be set to a value larger than the default. An error results if WCA is set to less than the default. 5. The terminal strip width WT can be set to zero. In this case, the user must set WF1=WF2=WCA. The response will not include the effects of the terminal strips and the steps. The user must add these effects using TRL and STEP elements 6. When the number of fingers N is odd, the model assumes that (N+1)/2 fingers are connected to node 1, while (N-1)/2 fingers are connected to node 2 (see dimensional diagram above). 7. The model takes into account the capacitance at the end of each finger and the small strips of length GAP at the beginning of each finger (outside the overlap region). References[1] J. Hobdell, “Optimization of Interdigital Capacitors,” IEEE Trans, on MTT, Sep 1979, pp. 788-791. [2] X She, and Y Chow, Interdigital Microstrip Capacitor as a Four-Port Network,”IEEE Proc. Pt. H, June 1986, pp. 191-197.
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