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Nexxim Simulator >
Support for External Models and Interfaces >
   Verilog Library Support >
       Creating a Verilog Component >
           Create a Verilog Component

Create a Verilog Component

The component definition provides all the information needed to instantiate the component in the schematic and generate a correct netlist for Nexxim to simulate. In this example the component is copied (“cloned”) from a standard Nexxim resistor. See Using the Component Editor in the Component Libraries topic for details on creating a new component.

1. In the top menu bar, select Tools>Edit Configured Libraries>Components. The Edit Libraries dialog opens on the Components tab. Make sure that the Show Project definitions is checked (on) and the Show all libraries checkbox is unchecked (off).

2. The Libraries panel at the upper right lists all the categories of Nexxim components. Scroll to the Nexxim Circuit Elements\Resistors category, and left click on that category. The dialog reopens to show the Nexxim resistor components. Left-click on the RES_ component to select it, and click Clone Component.

3. The Edit Component dialog opens. Enter the name RES_Verilog.

4. Under the Symbol field on the Edit Component dialog, click the Browse (...) button. The Select Definition dialog opens. Make sure that the Show Project definitions is checked (on) and the Show all libraries checkbox is unchecked (off). Select [personal]Verilog/Verilog_Symbols from the libraries listing, then select the nexx_Verilog_res from the Personal Library location in the listing. Click OK to close the Select Definition dialog.

5. Select the Miscellaneous tab on the Edit Component dialog, and change the Description to Resistor, Verilog.

6. Select the Terminals tab and verify that the terminal names have been read from the symbol:

7. Select the General tab, and click the Properties... button. The Edit Properties dialog opens.

8. Select and Remove any properties that are not to be used in the Verilog component. In our resistor example, the properties to be deleted are ADDNOISE and DTEMP.

9. The component requires a file property to link to the Verilog model. Click Add to open the Add Property dialog. Enter file as the Name, click the FileName radio button for the property type, and enter required as the value. When the component is instantiated in the schematic, the user sets the file property by selecting the Verilog library file from a Select File dialog.

10. The component requires a unique name. Click Add again. Enter SubcktName as the Name, click the Text radio button, and enter required as the value. When the component is instantiated, the user sets the SubcktName property to a unique name.

11. Add any additional parameters required as input variables in the Verilog model you are accessing. The resistor model in our example uses only variable R for the resistance. This property is already in the Nexxim resistor component. When the component is instantiated in the schematic, the user sets these parameters to the desired values. The instance values are passed to the Verilog model during simulation of the circuit.

12. Click on the CosimDefinition property Edit button (or click on the Solver on Demand tab of the Edit Component dialog and then click the Edit button for the Default Netlist entry). Edit the netlist string to the following:

The Multi-product Netlist definition specifies the format for the netlist entry that will be generated by instances of the Verilog component. In this string:

• simulator lang=spectre turns on the Spectre interpretation of the entries.

• \n entries are newlines.

• @file is the user-supplied name of the Verilog library file.

• R@ID is the reference designator, the letter R followed by a unique number, for example R23.

• \( and \) are literal left and right parentheses.

• %0 and %1 will be filled in with the names of the circuit nodes attached to the resistor terminals. If your component has more than two terminals, add %2, %3, etc.)

Note

The spaces around the %0 and %1 separating them from the parentheses are REQUIRED.

• @SubcktName is the user-supplied name of the Verilog subcircuit.

• R=@R netlists the resistance value, the characters R= followed by the value of the R property (@property puts the value of property in the netlist). Any other properties in the model should be added to the netlist string using this format.

• simulator lang=nexxim turns on the Nexxim interpretation of the resulting netlist.

13. Click OK to close the Multi-product Netlist definition dialog. Click OK to close the Properties dialog. Click OK to close the Edit Component dialog.

14. Select the new component in the Edit Libraries dialog and click Export to Library. Open the Verilog directory under PersonalLib, and save the resistor component in a new library file, Verilog_Resistors.aclb. Designer prompts you to confirm the creation of the new file.

15. In the top menu bar, select Tools>Configure Libraries. Select Components from the listing and verify that the new component library is configured for access from the Nexxim project:

16. This completes the process for creating the Verilog component. The new component appears in the Components panel of the Project Manager window.

17. To create an instance of the component, double-click the RES_Verilog entry, drag the cursor into the design area, and select Place and Finish from the menu.

18. Select the resistor and open the properties window: