A 900/1800 CMOSTransmitter for Dual-Band Applications

Abstract¡ªThe design of a radio-frequency transmitter that
can operate in two bands while employing a minimal number
of external components entails many challenges at both the
architecture and the circuit levels. This paper describes the
design of a 900-MHz/1.8-GHz transmitter implemented in CMOS
technology for dual-band applications. Configured as a two-step
architecture, the circuit generates the first upconverted signal
in quadrature form and subsequently performs single-sideband
modulation to produce the output in two bands. Fabricated
in a 0.6-m digital CMOS technology, the transmitter exhibits
unwanted spurs 40 dB below the carrier while drawing 75 mW
from a 3-V supply.
Index Terms¡ªGaussian minimum shift keying (GMSK) modulators,
radio-frequency (RF) CMOS circuits, single-sideband
(SSB) mixers, wireless transceivers.
I. INTRODUCTION
THE availability of new frequency bands in the 1.8-GHz
range and the proliferation of various wireless standards
have motivated vigorous efforts in the area of multistandard
transceivers. Providing both higher flexibility and roaming
capability and increasing the overall capacity in mobile communications,
dual-band operation has rapidly penetrated various
radio-frequency products. However, cost and form factor
considerations severely constrain the choice of the architecture
and frequency planning as well as the design of the building
blocks of such transceivers. In particular, the number of
oscillators, frequency synthesizers, and external filters and
resonators must be minimized.
This paper describes the design of a 900-MHz/1.8-GHz
CMOS transmitter for dual-band applications, with emphasis
on compatibility with the Global System for Mobile Communication
(GSM) and Digital Communication System at
1800 MHz (DCS1800). Employing two upconversion steps,
the circuit generates 900-MHz and 1.8-GHz outputs that can
assume linear or nonlinear modulation depending on the type
of signals applied to the baseband ports. A prototype fabricated
in a digital 0.6- m CMOS technology displays unwanted spurs
40 dB below the carrier while consuming 75 mW from a 3-V
supply. To our knowledge, this is the first published work on
a dual-band transmitter.
Section II of the paper deals with general issues in dualband
transmitters. Section III presents the transmitter architecture,
and Section IV describes the design of the building
blocks. Section V summarizes the experimental results.
Manuscript received September 7, 1998; revised December 18, 1998.
The author is with the Department of Electrical Engineering, University of
California, Los Angeles, CA 90095 USA (e-mail: razavi@ee.ucla.edu).
Publisher Item Identifier S 0018-9200(99)03673-2.
TABLE I
SYSTEM CHARACTERISTICS OF GSM AND DCS1800
Fig. 1. Time offset between receive and transmit time slots.
II. GENERAL CONSIDERATIONS
In this design, the GSM and DCS1800 standards have
been chosen as the framework. These standards incorporate
the same modulation format, channel spacing, and antenna
duplexing. Table I summarizes the characteristics of each
standard, indicating that a dual-band transceiver can exploit
the properties common to both so as to reduce the off-chip
hardware.
To minimize the number of oscillators and synthesizers,
the receivers and transmitters in a dual-band system must
be designed concurrently, with the frequency planning chosen
such that the receive and transmit paths are driven by
the same synthesizers. Although GSM and DCS1800 use
frequency-division duplexing (FDD) at the front end, their
actual operation is somewhat similar to time-division duplexing
(TDD) because their receive and transmit time slots are
offset by 1.73 ms (three time slots) (Fig. 1). Thus, frequency
synthesizers can be time-shared between the receiver and the
transmitter.
The dual-band transmitter described herein is designed
in conjunction with the dual-band receiver reported in [1].
To address the frequency planning issues, we briefly look
at the receiver (Fig. 2). Based on the Weaver image-reject
architecture [2], the receiver performs the first downconversion
such that the GSM and DCS1800 bands appear as images
of each other. The Weaver topology then selects one band
and rejects the other by addition or subtraction of the spectra
at points and . The first local oscillator (LO) frequency
0018¨C9200/99$10.00 ã 1999 IEEE
574 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 34, NO. 5, MAY 1999
Fig. 2. Dual-band receiver architecture.
(a)
(b)
Fig. 3. Generation of FSK and GMSK signals.
is therefore equal to 1350 MHz¡ªmidway between the two
bands¡ªand the second LO frequency is in the vicinity of
450 MHz. To minimize the number of LO¡¯s and synthesizer
loops, it is desirable to utilize the same frequencies for the
transmit path as well.
Before considering suitable transmitter architectures, we review
Gaussian minimum shift keying (GMSK) modulation to
arrive at some of the design implications. Fig. 3 conceptually
illustrates frequency shift keying (FSK) and GMSK. In FSK,
rectangular baseband pulses are directly applied to a frequency
modulator, e.g., a voltage-controlled oscillator (VCO), thereby
creating an output waveform given by
BB (1)
where is a constant denoting the ¡°depth¡± of modulation
and represents the baseband signal.
An important drawback of FSK is the large bandwidth
occupied by the modulated signal, partly because of the abrupt
transitions in the frequency introduced by the sharp edges of
the baseband pulses. We expect that if the frequency changes
more smoothly from one bit to the next, then the required
bandwidth decreases. In fact, the spectrum of the signal
expressed by (1) decays in proportion to , where
denotes the highest continuous derivative of [3]. Based
on this observation, GMSK modulation alters the shape of the
baseband pulses so as to vary the frequency gradually. As
shown in Fig. 3(b), the rectangular pulses are first applied to a
Fig. 4. Simple dual-band transmitter.
Gaussian filter, thereby generating smooth edges at the input of
the frequency modulator. The resulting output is expressed as
BB (2)
where is the impulse response of the
Gaussian filter.
The conceptual method described by Fig. 3(b) and (2) is
indeed employed in some transmitters, e.g., for the Digital
European Cordless Telephone standard. However, if the amplitude
of the baseband signal applied to the VCO or the gain
of the VCO are poorly controlled, so is the bandwidth of the
modulated signal. For this reason, in high-precision systems
such as GSM, the waveform in (2) is rewritten as
(3)
where , and and
are generated by accurate mixed-signal techniques [5], [6].
Equation (3) forms the basis for our transmitter design.
III. TRANSMITTER ARCHITECTURE
To employ 450- and 1350-MHz LO frequencies, we postulate
that the transmitter must incorporate two upconversion
steps: from baseband to an intermediate frequency (IF) of
450 MHz and from 450 to 900 MHz or 1.8 GHz. We also
recognize that a simple mixer driven by the 450-MHz IF and
the 1350-MHz LO generates the 900-MHz and 1.8-GHz signals
with equal amplitudes, necessitating substantial filtering
to suppress the unwanted component. It is therefore desirable
to perform the second upconversion by single-sideband (SSB)
mixing.
With the foregoing observations, we consider the topology
shown in Fig. 4 as a possible solution. The baseband and
signals are upconverted to 450 MHz and subsequently
separated into quadrature phases by means of an ¨C
network, resulting in and
. Single-sideband mixing of the IF
and the second LO signals is then carried out by two mixers,
with their outputs added or subtracted so as to produce the 900-
or 1800-MHz output according to the band select command.
The architecture of Fig. 4 provides a compact solution for
dual-band operation, but it suffers from several drawbacks.
First, the ¨C network introduces a loss of 3 dB in the
signal path, and, more important, loads the first upconverter.
Second, both of the outputs appear at the same port, making
it difficult to utilize narrow-band tuned amplification at this
RAZAVI: 900-MHz/1.8-GHz CMOS TRANSMITTER 575
Fig. 5. Effect of unwanted sideband on DCS1800 output.
Fig. 6. Increase in adjacent-channel power due to second harmonic of
unwanted sideband.
port. Third, even with perfect matching between the quadrature
paths in the SSB mixer, the variation of the absolute value
of with process and temperature leads to considerable
amplitude mismatch between and , thereby creating a
significant unwanted sideband at the output. For example, a
20% error in results in an unwanted sideband only 20 dB
below the wanted component.
The existence of an unwanted sideband 900 MHz away
from the desired signal may seem unimportant because various
filtering operations in the following power amplifier (PA)
and matching network provide further suppression. However,
second-order distortion in the PA¡ªa significant effect because
PA¡¯s are typically single ended¡ªmay lead to a troublesome
phenomenon in the generation of DCS1800 signals. Illustrated
in Fig. 5, the issue arises because the second harmonic of
the 900-MHz sideband falls in the transmitted DCS1800
channel. Since, from Carson¡¯s rule [4], the second harmonic
of a frequency-modulated signal occupies roughly twice as
much bandwidth as the first harmonic, the 1800-MHz output
may exhibit substantial adjacent-channel power, violating the
transmission mask (Fig. 6). Thus, the unwanted sideband
produced by the SSB mixer must be sufficiently small.
In summary, the architecture of Fig. 4 requires two modifi-
cations: 1) the IF quadrature generation must avoid the use of
¨C networks and 2) the GSM and DCS1800 paths must
be separated at some point such that each can incorporate
narrow-band tuning.
To produce the quadrature phases of the 450-MHz IF
signal, we recognize that the baseband signal is available in
quadrature phases, namely, and in (3). The IF
signal can thus be generated in quadrature form as depicted
in Fig. 7, where proper choice of the phases together with
addition or subtraction at the output yields both
and . Compared to the circuit of Fig. 4, this con-
figuration both provides higher gain balance between the two
Fig. 7. Upconversion with quadrature outputs.
Fig. 8. Two-step upconversion generating 900-MHz and 1.8-GHz outputs.
paths and avoids the loss and loading of the ¨C network
while using two more mixers. The additional mixers consume
more power, but since the conversion gain is higher in this
case, the following SSB mixers require less power, leading to
an overall power dissipation comparable to that of Fig. 4.
The 450-MHz outputs of the first upconverter can now
be multiplied by the quadrature phases of the second LO
and added or subtracted to generate the GSM and DCS1800
signals. As mentioned above, it is preferable to design the
second upconversion modulators such that the 900-MHz and
1.8-GHz waveforms appear at the outputs of two different
circuits, thus allowing efficient narrow-band amplification.
This is accomplished as shown in Fig. 8, where two independent
SSB modulators produce the two bands according to
the band select command. Note that narrow-band tuning also
suppresses the unwanted sideband resulting from mismatches
in the SSB mixers. To save power consumption, only one of
the modulators is active in either mode.
The overall architecture of the dual-band transmitter is
shown in Fig. 9. Since all of the signals up to ports and
are differential, each band incorporates a differential to
576 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 34, NO. 5, MAY 1999
Fig. 9. Dual-band transmitter architecture.
single-ended (D/SE) converter, applying the result to an output
buffer. The transmitter requires external power amplifiers to
deliver the high power levels specified by GSM and DCS1800.
IV. BUILDING BLOCKS
In this section, we describe the transistor-level implementation
of each building block, emphasizing the design constraints
imposed by the architecture. The circuit topologies are identical
for both bands, but device dimensions and bias currents
are chosen to optimize the performance of each.
A. First Upconversion
The 450-MHz upconversion modulator consists of two
Gilbert cell mixers whose outputs are added in the current
domain. Shown in Fig. 10, the circuit utilizes resistive source
degeneration, thereby improving the linearity in the baseband
port of each mixer. Two 100-nH inductors convert the output
current to voltage. To minimize the area occupied by each
inductor, a stack of three spiral structures made of three metal
layers [Fig. 10(b)] is used [1], reducing the area by approximately
a factor of eight [7]. Since the polysilicon connection
and the bottom spiral suffer from substantial parasitic capacitance
to the substrate, this node is connected to the supply
voltage, increasing the self-resonance frequency of the inductor.
The quality factor of the inductor is estimated to be about
four, and the self-resonance frequency is about 600 MHz.
Why must the baseband ports be linearized? Let us return to
(3) with the assumption that and experience thirdorder
distortion. The resulting IF signal can then be expressed
as
(4)
where represents the amount of third-order nonlinearity.
Grouping the terms in (4), we obtain
(5)
Equation (5) reveals that third-order distortion gives rise to a
(a)
(b)
Fig. 10. (a) First upconversion modulator and (b) implementation of load
inductors.
Fig. 11. Simulated spectra of the two terms in (5) (horizontal scale normalized
to bit rate; vertical scale 5 dB/div.).
component centered around but with a modulation index
three times that of the ideal GMSK signal. Invoking Carson¡¯s
rule, we postulate that the second term occupies roughly
three times the bandwidth, raising the power transmitted in
adjacent channels. Fig. 11 shows the simulated spectra of
the two components in (5) with , indicating that the
RAZAVI: 900-MHz/1.8-GHz CMOS TRANSMITTER 577
Fig. 12. Effect of harmonic distortion at baseband ports.
Fig. 13. Voltage-to-current converter with output switching.
Fig. 14. Single-sideband modulator circuit.
Fig. 15. Differential to single-ended conversion using (a) tuned current
mirror and (b) negative resistance generator.
unwanted signal indeed consumes a wider band. For this
reason, as depicted in Fig. 12, must be small enough that
the transmission mask is not violated. In this design, the
resistive degeneration and tail currents are chosen so as to
ensure with a 0.5-V baseband input, yielding a
third-order component 40 dB below the desired signal.
B. SSB Modulator
The signals generated at nodes and in Fig. 10 must
be ¡°routed¡± to one of the SSB modulators according to the
Fig. 16. Output buffer.
Fig. 17. Transmitter die photograph.
band select command. As illustrated in Fig. 13, the routing is
performed in the current domain to minimize signal loss due
to addition of the switches. Capacitively coupled to the output
of the 450-MHz upconverter, the voltage-to-current converter
employs grounded-source input devices to save the voltage
headroom otherwise consumed by a tail current source. The
bias current of the circuit is defined by and . Note
that ¨C operate in the deep triode region, sustaining a
small voltage drop. Also, the linearity of this and subsequent
stages is not critical because GMSK signals display a constant
envelope and are quite insensitive to spectral regrowth [6].
578 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 34, NO. 5, MAY 1999
(a)
(b)
Fig. 18. Measured output spectrum at (a) 898 MHz and (b) 1.8 GHz (horizontal 1 MHz/div.; vertical 10 dB/div.).
With the quadrature phases of the IF signal available in
the current domain, SSB mixing assumes a simple topology.
Shown in Fig. 14, the circuit senses the differential current
signals routed from each 450-MHz upconverter, performs
mixing with the second LO, adds the resulting currents with
proper polarity, and converts the output to single-ended form.
C. Differential to Single-Ended Converter
To achieve a reasonable gain, it is desirable to employ tuning
in the D/SE converter. Fig. 15 depicts two realizations of such
a circuit. In Fig. 15(a), a current mirror together with two
inductors creates resonance at nodes and , reducing the
effect of device capacitances. The difficulty here is the large
gate-source capacitance of the two PMOS devices, mandating
a small value for and hence a low conversion gain.
Fig. 15(b) presents an alternative topology where a PMOS
device introduces a negative resistance in parallel with a
floating inductor. It can be shown that
(6)
where and denote the total capacitance at nodes
RAZAVI: 900-MHz/1.8-GHz CMOS TRANSMITTER 579
and , respectively [6]. As a compromise between margin
to oscillation and boost in gain, the negative resistance,
, is chosen to increase the of the inductor
by approximately a factor of two. Note that can assume
a relatively large value because it sees and in series.
In this design, the signal is sensed at because this port
exhibits a lower output impedance. Simulations indicate that
the topology of Fig. 15(b) provides about three times the
voltage gain of the circuit in Fig. 15(a).
D. Output Buffer
The output buffer is shown in Fig. 16. Two common-source
stages, and , boost the signal level, driving the 50-
impedance of the external instrumentation. The bias current
of is defined by and , and that of by and
. Neglecting the dc drop across the inductor, we have
; that is, can be ratioed
with respect to .
V. EXPERIMENTAL RESULTS
The dual-band transmitter has been fabricated in a 0.6- m
CMOS technology. Fig. 17 shows a photograph of the die,
which measures 1300 850 m . All of the inductors are
integrated with no additional processing steps.
The prototype is directly mounted on a printed circuit board
and tested with a 3-V supply. The baseband signal consists of
quadrature phases of a 1.2-MHz sinusoid, and the quadrature
phases of LO and LO are generated by external couplers.
Fig. 18(a) shows the measured output spectrum when the
900-MHz band is selected. In addition to the desired component,
the spectrum exhibits spurs corresponding to
, the lower sideband (resulting from mismatches in the
first upconverter), and upconverted harmonics of the baseband
signal. Similarly, as shown in Fig. 18(b), the 1.8-GHz output
contains spurs at , the upper sideband, and
harmonics of the baseband input. Note that in both cases, the
spurious components are at least 40 dB below the carrier. The
circuit dissipates 75 mW, of which 10 mW is drained by the
four upconversion mixers, 10 mW by the SSB mixer, and
55 mW by the output buffer.
Two aspects of these results should be revisited for
GSM/DCS1800 applications. First, the output level is
relatively low, necessitating an additional buffer prior to the
power amplifier. Second, from the plots of Fig. 18(a) and (b),
the thermal noise at large frequency offsets is approximately
TABLE II
PERFORMANCE OF DUAL-BAND TRANSMITTER
equal to 107 dBc/Hz at 900 MHz and 104 dBc/Hz at
1.8 GHz, requiring that the front-end duplexer filter provide
adequate suppression of this noise in the receive band.
Table II summarizes the performance of the dual-band transmitter.
VI. CONCLUSION
The design of dual-band transmitters poses many challenges
in terms of frequency planning and compatibility with their
corresponding receivers. A two-step transmitter architecture
has been introduced that provides dual-band operation with
450- and 1350-MHz LO frequencies. Also, circuit techniques
for the generation of the quadrature phases of the IF signal as
well as differential to single-ended conversion are presented.
ACKNOWLEDGMENT
The author wishes to thank R. Thiara for simulation results
of Fig. 11.
REFERENCES
[1] S. Wu and B. Razavi, ¡°A 900-MHz/1.8-GHz CMOS receiver for dualband
applications,¡± IEEE J. Solid-State Circuits, vol. 33, pp. 2178¨C2185,
Dec. 1998.
[2] D. K. Weaver, ¡°A third method of generation and detection of singlesideband
signals,¡± Proc. IRE, vol. 44, pp. 1703¨C1705, Dec. 1956.
[3] J. B. Anderson, T. Aulin, and C.-E. Sundberg, Digital Phase Modulation.
New York: Plenum, 1986.
[4] L. W. Couch, Digital and Analog Communication Systems, 4th ed.
New York: Macmillan, 1993.
[5] K. Feher, Wireless Digital Communications. Englewood Cliffs, NJ:
Prentice-Hall, 1995.
[6] B. Razavi, RF Microelectronics. Upper Saddle River, NJ: Prentice-
Hall, 1998.
[7] R. B. Merril et al., ¡°Optimization of high Q inductors for multi-level
metal CMOS,¡± in Proc. IEDM, Dec. 1995, pp. 38.7.1¨C38.7.4.
Behzad Razavi (S¡¯87¨CM¡¯90), for a photograph and biography, see p. 276 of
the March 1999 issue of this JOURNAL.