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Nexxim Simulator > Via Through Hole with Reference
Netlist FormatA via hole instance has the following netlist format: Axxx n1 n2 [D=val] [DG=val] COMPONENT=viahole SUBSTRATE=substrate_name n1 and n2 are the names of the node attached to the via through hole. The entry COMPONENT=viahole identifies the element as a via through hole. The entry SUBSTRATE=substrate_name identifies the Stripline substrate model name selected for the design (see Selecting a Stripline Substrate). See the Stripline (SL) Substrate for information on this substrate type.
Netlist ExampleA21 Port1 net_31 D=0.001 COMPONENT=viahole SUBSTRATE=SL1 where SL1, the selected layout technology or substrate type, has a definition such as: .SUB SL1 SL( B=0.001524 Er=4.40000000000000 Notes1. [All substrates] If metallization is not specified in the referenced substrate definition, the via element behaves as an inductance only.
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