3D-TLM Simulator is capable of modelling wires and linear lumped circuits. These elements are modelled as sub-cell features. This means that wires can have an arbitrary length but must be thin compared to the cell sizes used in the model. It is, however, possible to model a number of closely spaced wires, passing through a single cell. This is referred to as a multi-wire or multiconductor model.
Wires are represented as a path of points (vertices). The points determine the physical position of the wire, and are used to attach certain features to the wire, such as excitation, output or load. The first and the last point are referred to as terminal points. Only terminal points can be used for the connection to other wires or lumped circuits.
Electrical connection between individual wires is defined implicitly, by using identical terminal points. A wire terminating on a non-terminal point of another wire or sharing a non-terminal point with another wire will not be connected to it.
Connection to a lumped circuit can be made via terminal points and is defined explicitly using the circuit name and connecting circuit node (pin) number. The lumped circuits are assumed to be dimensionless and reside on cell faces where wires terminate.
Wires terminating on a conductive surface will be electrically connected to it, unless an explicit connection to a lumped circuit is defined for that terminal point. A wire cannot overlap with a metal body, neither can it pass through a metal plane, thin panel or lumped cell interface
Wire features, such as in-line voltage sources, resistive loads and time-domain outputs can be defined at any wire point, excluding terminal points explicitly connected to a lumped circuit. The voltage source can be delayed in time.
The time-domain output is wire current. However, when source and output are attached to the same point, the wire voltage output is also recorded in the output file. This data is needed in any subsequent wire ‘port’ calculation to obtain scatter parameters. Ports are points on a wire at which a resistance and an output have been defined. Source and output polarity is assumed up the wire (as defined by the ordering of the points).
Wires can be placed close to each other, passing through the same cell, thus forming a multi-wire or multi-conductor. They can bend, make junctions or terminate in arbitrary places, but they should not touch or overlap in the longitudinal dimension.
Wires can be terminated using lumped circuits formed by any number of resistors, inductors, capacitors and voltage sources. Lumped circuits are described by circuit components and circuit nodes. The circuit components that are available are resistors (R), inductors (L), capacitors (C) and voltage sources. Circuit nodes are the end points of circuit components and wire termination points.
One node in the lumped circuit can be identified as a chassis node. This node will be electrically connected to a nearby conducting object. As such, a chassis node should only be set if the cell face on which the circuit is located is on a conducting object.
The circuit definition does not specify how the circuit connects to the wires. This is specified in the wire definition and allows more than one wire to be connected to each node in the circuit. The end points of all wires connecting to a circuit should lie on the same cell face or adjacent cell faces of a conducting body.
Lumped circuit time domain current output can be obtained for each lumped component with non-zero impedance. In addition, time domain voltage output can be obtained between any two nodes.
By default wires are modelled as unshielded. If a Cable material is defined and attached to a wire in Build, then the wire will be converted to a shielded cable containing a single inner conductor.
The 3D simulator will take the Resistance and Inductance characterizing the braid, and apply a transfer impedance model to predict what voltage will be driven between the inner conductor and the outer shield when a known current exists on the outer surface of the shield. Voltages excited inside the wire will propagate along the length of the inner wire to terminations of the wire. The terminations are matched to the cable characteristic impedance. The terminal currents are stored and reported in the time domain output file of the 3D simulator.
A post processing tool called Shielded Cable Solver is available for applying different simple impedances to the inner wire terminations.
It is important to remember that interaction between the electromagnetic field and wires is modelled in the cell centers. Although wires can be physically defined anywhere in the mesh, including positions which coincide with a cell face or cell edge, their interaction with the field will be ultimately modelled in the center of the closest cell.
Care must be taken in positioning a wire running close to the surface of an object. The surface is constrained to lie between cells while the wire is modelled at the cell centers; hence any wire to surface separation of between zero and one cell-size, will result in a modelled separation of half a cell. Thus the wire to surface separation will be determined by the mesh not by the actual geometric separation. If the correct separation is an important feature of the model in such circumstances, a cell face should be aligned with the surface under the wire and another with a plane at twice the separation above the surface.
Another potential problem occurs if the wire terminates close to a metal surface, but is not physically connected to it. If the distance is less than the wire radius, the wire will be snapped to that metal surface and will be modelled as electrically connected to it. If this model is incorrect, then a finer mesh in the region must be used, to allow for the distance of more than a radius between the end of the wire and the metal surface.
In exceptionally rare situations, involving complex-shaped bodies, a wire terminating on a metal surface might be detached from this surface during the automatic meshing. It is therefore advisable to use a finer mesh in the region where the wire connects to such a body to avoid any ambiguity.
The above two problems could be also resolved by using connections to a metal via single NULL node of a dummy lumped circuit. If the connection to a metal is required, then the NULL node should be declared as a chassis node. If the connection to metal is not required, then a chassis node must not be defined.
All wires connecting to a circuit should lie on the same cell face or adjacent cell faces of a conducting body. Not following this rule will create an incorrect model.
Two (or more) wires terminating at the same cell face can connect to a maximum of one circuit. If they connect to different circuits, an error will be reported. The work-around is to merge the two (or more) lumped circuits into one circuit.
Wires cannot pass through thin metal planes, even if there is a thin slot defined at the position of wire intersection with metal. In the absence of the thin slot, this problem can be simply resolved by splitting the wire into two and grounding at both sides of the metal plate. In the case of a wire passing through a thin slot, the work-around (giving the simplest approximation of the model) would be to split wires and reconnect using a dummy (NULL) circuit node. A more accurate model could be obtained by creating a representative lumped circuit, which will take into account capacitance and inductance of the slot, and connecting parts of the wire from both sides of the slot to that circuit.
Field output at cells occupied by wires is not recorded.
The multi-conductor model calculates simulation parameters by assuming that wire radii are small compared to the wire separations. This effectively means that, in order to maintain an accurate model, two wires must be separated by at least one wire diameter. This will ensure that errors in calculating simulation parameters of the multi-wire segments are less than 5.3%. If this requirement is not met, the simulator will not run. In this situation, the user is advised to decrease the radii of wires (if not critical for the model) thus increasing the relative separation of wires.
Certain multi-conductor configurations may cause the model to be numerically unstable. This could happen, for example, when multiple wires are placed too far apart within the single cell, or a single wire has too large a radius. If this occurs, the 3D TLM Simulator will fail the job and the user is advised to re-mesh the model with different cell sizes.
Wires passing through frequency-dependent media and PML are not implemented and will result in an incorrect model.