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System Simulator >
   Features and Capabilities of the System Simulator       


Features and Capabilities of the System Simulator

The following describe a number of features and capabilities of the Designer System Simulator:

•  Integration of system analysis into the Designer desktop: Enables you to perform system simulations and analysis using Designer’s highly intuitive schematic entry, report generation, and graphics interface. The system simulation environment also allows you to include a higher level of detail in system designs by co-simulating with the circuit and planar EM simulators of Designer.

•  Simulation of multi-channel RF and high frequency electrical topologies: Single-tone and multi-tone frequency domain analyses are applicable to arbitrary electrical linear topologies interconnected by nonlinear electrical cascaded topologies. Users are able to examine the performance of such topologies in terms of S-parameters, NF, group delay, noise power, SNR, VSWR , internal/external voltages and powers, as well as nonlinear figures of merit (OIP3, Psat, P1dB, and Dynamic range applicable only to nonlinear cascaded systems). In addition, you can view the resulting single-tone/multi-tone voltage and power spectrums at arbitrary nodes inside an electrical topology. This helps you examine the contribution of individual elements to voltages/powers and intermodulation distortion (IMD) due to mixers and other nonlinear elements.

•  Enhanced multi-tone IMD analysis: This enhanced analysis is capable of calculating the output IMD for an arbitrary number of excitation tones applied to a nonlinear electrical topology. Output IMD results also include the effects of all IMD generated within the system.

•  Enhanced discrete time signal analysis: Enables you to simulate a variety of wired/wireless applications that include feedback and mixed components (functional and electrical) that are applicable to arbitrary DSP and mixed-mode topologies. Examples include GSM, IS-95 CDMA, phase locked loops (PLLs)/frequency synthesizers, delay-locked loops (DLLs) and sliding block correlators (SBCs) for CDMA transceiver design, spectral re-growth, and cross modulation.

•  Discrete time analysis: Includes transient, steady state, and active/thermal/phase noise responses, as well as effects on system performance.

•  Discrete time simulation results: These may be viewed in a variety of ways and at arbitrary nodes in the system, whether in the sweep, time, or spectral domain. In addition, a given response in the time/spectral domain may be viewed for several values of an arbitrarily swept parameter. This helps identify the impact of a given parameter (gain, NF, etc.) on the response of interest.

•  Measurable figures of merit: These measurements may be obtained for arbitrary swept parameters (gain, NF, and S-parameters) and will reflect any distortion in the system that is the result of group delay, noise, and nonlinearities. This includes discrete time system analysis like bit error rate (BER) and adjacent channel power ratio (ACPR). Some measurements are made available through the use of probes, while others include phase-noise and signal-to-noise ratios.

•  User-defined models: Designers can introduce their own electrical or functional user-defined models (UDMs) using C/C++ or MATLAB syntax.

•  User-defined analyses: Designers can perform tuning, optimization, sensitivity, and statistical analyses on system designs.

•  System component library: The Designer component library supports a variety of DSP and high frequency wired/wireless applications, along with a wide range of components.

•  PSpice®: Available outputs include a subset of PSpice syntax.




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