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System Simulator > Serial Analog to Digital Converter (ADC)
Notes1. The output of this ADC is a serial bit stream representing the amplitude of the input signal at the sampling instances. The input voltage Range/Type from Vl to Vh is partitioned into 2nbits values. Each interval is indexed by an integer value ranging between 0 and 2nbits–1. The intervals are labeled according to the offset binary format; that is, the interval corresponding to Vl is encoded at 00 … , 0; the next largest voltage interval is encoded as 00… ,01 etc.; and, the interval corresponding to Vh is encoded as 111 … , 11. 2. At every positive clock edge, the ADC samples the input signal, determines the interval in which the sample lies, and outputs the corresponding index of that interval. The output is a serial bit stream; each bit is placed on the output pin for one clock period—the LSB is output first and the MSB is output last. At the end of nbits clocks, all bits have been transmitted and the input voltage is sampled again. 3. In the following illustration, a signal is the input into the ADC element, which has as its parameter values Nbits=8, vl = -1V and Vh = 1V. The ADC is clocked at a rate of 0.015625 µs. Netlist FormADC:Name n1 n2 n3 NBITS=val Vl=val Vh=val [Rin1=val] [Rin2=val][Rout=val] Netlist ExampleADC:1 1 2 3 Nbits=8 Vl=-1 Vh=1 HFSS视频教程 ADS视频教程 CST视频教程 Ansoft Designer 中文教程 |
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